Technical Field
The invention relates to a semiconductor technology. More particularly, the invention relates to a semiconductor substrate and a semiconductor device with reduced bow height.
Description of Related Art
As wafer size increases and device size shrinks, lots of chips or dies can be simultaneously formed on a single wafer to reduce average cost.
However, if it is desired to form various devices and circuits on the wafer, the degree of stress concentration may be different in array regions and periphery regions due to different materials and different layouts during different processes, and thus high bow height may be occurred.
For example, if the bow height is too large (i.e. positive bow height is too high), the uniformity of film deposition may be affected, and the wafer may not be adsorbed resulting in relevant process failure. On the other hand, if the bow height is too low (i.e. negative bow height is too high), the critical dimension may be error, and the film may be undesirably deposited on the wafer back.
Therefore, it is necessary to find the solution for controlling the bow height of wafer during semiconductor process.